Buddhimah/System-Bus-Design-Verilog
This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification
Software Engineer at WSO2 Graduated from University of Moratuwa Department of Electronic and Telecommunication. Former Intern at Millennium IT
This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification
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