Buddhima Udaranga

@Buddhimah · User

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Software Engineer at WSO2 Graduated from University of Moratuwa Department of Electronic and Telecommunication. Former Intern at Millennium IT

@WSO28 followers97 repositories

Repositories

Buddhimah/System-Bus-Design-Verilog

This is a Multi master Multi slave compatible system bus design modeled using verilog. This is much like AMBA AHB Specification

★ 32VerilogForks 19

Buddhimah/react-jwt-auth

React JWT Authentication & Authorization example - React.js Login and Registration example

★ 0Forks 0