LukasVik/lukasvik-io
Personal website: https://lukasvik.io
Repositories
LukasVik/dotfiles
LukasVik/funny_fifo
Asynchronous FIFO design using Gray-coded address lookup tables instead of arithmetic.
LukasVik/setup-ghdl-ci
JavaScript action for users to easily install tip/nightly GHDL assets in GitHub Actions workflows
LukasVik/rtoml
A fast TOML library for python implemented in rust.
LukasVik/digilent-xdc
A collection of Master XDC files for Digilent FPGA and Zynq boards.
LukasVik/LukasVik
Config files for my GitHub profile.
LukasVik/verilog-axis
Verilog AXI stream components for FPGA implementation
LukasVik/vunit
VUnit is a unit testing framework for VHDL/SystemVerilog