SingularityKChen/FasterTransformer
Transformer related optimization, including BERT, GPT
I am a slow walker, but I never walk back.
Transformer related optimization, including BERT, GPT
Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards
An RTL generator for a last-level shared inclusive TileLink cache controller
Tools for integrating DspTools components into a rocket-chip
RTL blocks compatible with the Rocket Chip Generator
educational microarchitectures for risc-v isa
Berkeley's Spatial Array Generator
FireSim: Easy-to-use, Scalable, FPGA-accelerated Cycle-accurate Hardware Simulation in the Cloud
A Library of Chisel3 Tools for Digital Signal Processing
Useful utilities for BAR projects
SonicBOOM: The Berkeley Out-of-Order Machine
Microarchitecture implementation of the decoupled vector-fetch accelerator
A Chisel RTL generator for network-on-chip interconnects
The official testing library for Chisel circuits.
An integrated cache and memory access time, cycle time, area, leakage, and dynamic power model
Rocket Chip Generator
Network components (NIC, Switch) for FireBox
chipyard in mill :P
An Easy-to-use Speech Toolkit including SOTA ASR pipeline, influential TTS with text frontend and End-to-End Speech Simultaneous Translation.
Flexible Intermediate Representation for RTL
RISC-V Cores, SoC platforms and SoCs
A minimal, modularized, and machine-independent hardware abstraction layer
给微信公众号生成 RSS 订阅源
Template testbench for HWPEs (using the hwpe-mac-engine as example)