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amir-hk's Projects

bacs icon bacs

Benchmarks for Approximate Circuit Synthesis

binary-neural-networks icon binary-neural-networks

Implemented here a Binary Neural Network (BNN) achieving nearly state-of-art results but recorded a significant reduction in memory usage and total time taken during training the network.

damov icon damov

DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is intended to study new architectures, such as near-data processing. Described by Oliveira et al. (preliminary version at https://arxiv.org/pdf/2105.03725.pdf)

dnn_neurosim_v2.1 icon dnn_neurosim_v2.1

Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)

eva-cim icon eva-cim

Code of "Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures", TCAD 2020

imac icon imac

IMAC is an In-memory Multiply and ACcumulation Engine (TCAS 2020)

mcpat icon mcpat

An integrated power, area, and timing modeling framework for multicore and manycore architectures

memtorch icon memtorch

A Simulation Framework for Memristive Deep Learning Systems

mlp_neurosim_v3.0 icon mlp_neurosim_v3.0

Benchmark framework of synaptic device technologies for a simple neural network

mnsim-2.0 icon mnsim-2.0

A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems

multipim icon multipim

MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator

nvmain icon nvmain

NVMain - An Architectural Level Main Memory Simulator for Emerging Non-Volatile Memories

pimsim icon pimsim

PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.

prim-benchmarks icon prim-benchmarks

PrIM (Processing-In-Memory benchmarks) is the first benchmark suite for a real-world processing-in-memory (PIM) architecture. PrIM is developed to evaluate, analyze, and characterize the first publicly-available real-world PIM architecture, the UPMEM PIM architecture. Described by Gómez-Luna et al. (preliminary version at https://arxiv.org/abs/2105.03814).

pytorch-lightning icon pytorch-lightning

The lightweight PyTorch wrapper for high-performance AI research. Scale your models, not the boilerplate.

ramulator icon ramulator

A Fast and Extensible DRAM Simulator, with built-in support for modeling many different DRAM technologies including DDRx, LPDDRx, GDDRx, WIOx, HBMx, and various academic proposals. Described in the IEEE CAL 2015 paper by Kim et al. at http://users.ece.cmu.edu/~omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf

ramulator-pim icon ramulator-pim

A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combines a widely-used simulator for out-of-order and in-order processors (ZSim) with Ramulator, a DRAM simulator with memory models for DDRx, LPDDRx, GDDRx, WIOx, HBMx, and HMCx. Ramulator is described in the IEEE CAL 2015 paper by Kim et al. at https://people.inf.ethz.ch/omutlu/pub/ramulator_dram_simulator-ieee-cal15.pdf Ramulator-PIM is used in the DAC 2019 paper by Singh et al. at https://people.inf.ethz.ch/omutlu/pub/NAPEL-near-memory-computing-performance-prediction-via-ML_dac19.pdf

sc-dnn icon sc-dnn

Stochastic Computing for Deep Neural Networks

scsynth icon scsynth

Synthesis tool for stochastic computing

simple-magic icon simple-magic

SIMPLE MAGIC: Synthesis and In-memory MaPping of Logic Execution for Memristor Aided loGIC

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