Comments (8)
@carlosdep Thanks. This is being worked in YosysHQ/yosys#2068. We also hit YosysHQ/yosys#2065, and the fix just went in. We promise to add some Travis CI around this soon!
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@carlosedp, the docker images used by the Makefile in this repo are maintained in ghdl/docker. I think it is important for you to know that these images are slightly lagging behind master
branches of the different projects/tools. As you can see in the README, the synchronization between repos in org ghdl was recently implemented. As a result, all the images should be updated within a few hours after changes are pushed to ghdl/ghdl. However, yosys and nextpnr are updated weekly.
In the future, I'd like to split non-ghdl tools to SymbiFlow (see eine/symbiflow-containers and dbhi/qus) and set up cross-triggers between Yosys/nextpnr and SymbiFlow. However, the proposal is not ready yet.
As commented by @antonblanchard, CI was added (and it's being improved, #201). Hence, CI should let you/us know when the merged PRs in yosys do arrive to the released images.
@mikey, I cannot watch this repo because I'm already handling a quite high traffic lately. Nonetheless, please do not hesitate to ping me in issues related to CI and/or Docker images.
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Adding xics.vhdl
to VHDL_FILES
, now gives me:
...
Optimizing lut $abc$760867$auto$blifparse.cc:498:parse_blif$787564.lut0 (4 -> 0)
Optimizing lut $abc$760867$auto$blifparse.cc:498:parse_blif$787662.lut0 (4 -> 0)
Optimizing lut $abc$760867$auto$blifparse.cc:498:parse_blif$787663.lut0 (4 -> 0)
Optimizing lut $abc$760867$auto$blifparse.cc:498:parse_blif$766845.lut1 (4 -> 0)
Removed 0 unused cells and 58406 unused wires.
2.49. Executing AUTONAME pass.
Reaping losing child 0x7f90e55088c0 PID 97653
gmake: *** [Makefile.synth:61: microwatt.json] Error 137
Removing child 0x7f90e55088c0 PID 97653 from chain.
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One error at a time. After updating yosys and nextpnr containers, I'm getting this at nextpnr-ecp5:
docker run --rm -v /Users/cdepaula/repos/microwatt:/src:z -w /src ghdl/synth:nextpnr-ecp5 nextpnr-ecp5 --json microwatt.json --lpf constraints/ecp5-evn.lpf --textcfg microwatt_out.config --um5g-85k --freq 12 --package CABGA381
Info: Logic utilisation before packing:
Info: Total LUT4s: 43536/83640 52%
Info: logic LUTs: 40316/83640 48%
Info: carry LUTs: 2212/83640 2%
Info: RAM LUTs: 672/41820 1%
Info: RAMW LUTs: 336/20910 1%
Info: Total DFFs: 24566/83640 29%
Info: Packing IOs..
Info: pin 'ext_clk$tr_io' constrained to Bel 'X63/Y0/PIOA'.
Info: pin 'ext_rst$tr_io' constrained to Bel 'X0/Y92/PIOD'.
Info: pin 'uart0_rxd$tr_io' constrained to Bel 'X0/Y92/PIOB'.
Info: pin 'uart0_txd$tr_io' constrained to Bel 'X0/Y92/PIOC'.
Info: Packing constants..
Info: Packing carries...
Info: Finding LUTFF pairs...
Info: Packing LUT5-7s...
Info: Finding LUT-LUT pairs...
Info: Packing paired LUTs into a SLICE...
Info: Packing unpaired LUTs into a SLICE...
Info: Packing unpaired FFs into a SLICE...
Info: Generating derived timing constraints...
Info: Promoting globals...
Info: promoting clock net ext_clk$TRELLIS_IO_IN to global network
Info: Checksum: 0x57f781d5
Info: Annotating ports with timing budgets for target frequency 12.00 MHz
ERROR: cell type '$assert' is unsupported (instantiated as 'soc0.processor.register_file_0.4565')
0 warnings, 1 error
gmake: *** [Makefile.synth:64: microwatt_out.config] Error 255
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@carlosedp Thanks for reporting. Sorry I've not had time to look at this but I'll get to it eventually.
from microwatt.
@carlosedp can you try #209 ?
from microwatt.
@carlosedp upstream should build now. The image doesn't work yet but I should have that soon.
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Fixed in #209
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Related Issues (20)
- Adding FPGA board support HOT 4
- Add tests for PMU events HOT 1
- Usage of RAM block as ROM
- Question about microwatt, HOT 2
- Commit eb20195a breaks building of mw_debug on Fedora HOT 4
- Add support for NiteFury/LiteFury HOT 4
- Add resets to all register state
- Issue while trying to build microwatt project for the first time HOT 2
- Litedram no longer works on Genesys2 (and possibly NexysVideo and Nexys4DDR) HOT 2
- System call exceptions aren't always executed in single step mode HOT 2
- Branch cache aliasing between IR=0 and IR=1 HOT 1
- Add testcase for new warning
- Graph FPGA resource usage with over time HOT 6
- Add testcase for new latches
- apparent bug in plru HOT 4
- Generated files have absolute paths
- Truncated 64 bit memory access to dram init range HOT 1
- fusesoc initialization error
- Radix Question HOT 1
- Illegal instruction in init when trying to run Linux HOT 1
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