我是吕俊树,一位对硬件和信号处理技术充满热情的开发者。 我是一名大三学生,目前就读于中南大学自动化学院电子信息工程系。 在这个小小的代码角落,我记录着我的学习、项目和一些技术心得。 让我们一起踏上的奇妙旅程吧!
I'm Junshu Lv, a passionate developer enthusiastic about coding and technology. I am majoring in the Department of Electronic Information Engineering, School of Automation,Central South University. In this little corner of code, I document my learning, projects, and some technical insights. Let's embark on this fascinating coding journey together!
🌱 我目前正在专注于PCB、FPGA方面的学习。
- I am currently focusing on PCB and FPGA.
💡 我喜欢探索新技术,构建有趣的项目,同时不断学习和成长。
- I love exploring new technologies, building interesting projects, and continually learning and growing.
💻 我主要的编程语言:
- Python、Verilog、C、MATLAB
🌐 我主要的技术栈:
- PCB设计(嘉立创EDA、Altium Designer、Cadence)
- 数字信号处理
- FPGA开发
如果你对我的项目或者学习方向感兴趣,欢迎一起交流、合作或者提供宝贵的建议。让我们共同进步,共同探索技术的边界! If you're interested in my projects or learning focus, feel free to connect, collaborate, or provide valuable feedback. Let's progress together and explore the boundaries of technology!