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ax309

ax7010_2023.1

AX7010 board is widely used in security monitoring, automotive electronics, machine vision, intelligent manufacturing, video and audio acquisition and processing, medical equipment, instrumentation, smart grid and other industries.

ax7035

ax7350b_2023.1

The AX7350B board is suitable for high-speed data exchange, data storage, video transmission processing, fiber/Ethernet communication, and industrial control.

dsp-rtl-lib

RTL Verilog library for various DSP modules

gnss-baseband

Baseband Receiver IP for GPS like DSSS signals

gnss-dsp-tools

GNSS code generators, acquisition, and tracking

gnss-related-sources

A collection of awesome GNSS/RNSS related sources, tools, data, MOOC's course, etc.

gnss_firehose

Wideband front-end digitizer for GPS, GLONASS, Galileo, BeiDou

ita-cores

RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32

jetsonyolov7-tensorrt

linux_kernel-alinx

A version of the Xilinx Linux kernel modified for ALINX's MPSoC and ZYNQ7000 series boards

migen_litex_tutorials

nexysddr4-risc-v_picorv32

Using VIVADO, Nexys DDR 4 board with RISC-V PicoRV32 CPU

openpiton

The OpenPiton Platform

picorv32_soc

picorv32_soc, simulation env, FPGA, boot code, RTOS

picorv32_xilinx

A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz

pulp

This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.

pulp-dronet

A deep learning-powered visual navigation engine to enables autonomous navigation of pocket-size quadrotor - running on PULP

pulp-sdk

pulpino

An open-source microcontroller system based on RISC-V

pulpissimo

This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.

pysdr

PySDR.org textbook source material, feel free to post issues/PRs

scr1

SCR1 is a high-quality open-source RISC-V MCU core in Verilog

universal_npu-cnn_accelerator

hardware design of universal NPU(CNN accelerator) for various convolution neural network

vivado-picorv32

A Vivado IP package of the PicoRV32 RISC-V processor

xilinx-risc-v

Porting PicoRV32 to Artix-7 and Spartan-7. Generic vivado template for supported Xilinx FPGA is included.