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bjzhangwn's Projects

80211scrambler icon 80211scrambler

Tools for working with the 802.11B scrambler when writing Packet-in-Packet exploits.

async_fifo icon async_fifo

A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog

beam icon beam

Beam: Scalable Confidential Cryptocurrency. A Mimblewimble implementation.

blake2 icon blake2

Hardware implementation of the blake2 hash function

cocotb icon cocotb

cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

corundum icon corundum

Open source, high performance, FPGA-based NIC

hls_ldpc_dec icon hls_ldpc_dec

Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..

lzs icon lzs

an open source lzs hardware & software

lzw_systemc icon lzw_systemc

An implementation of LZW encoder in SystemC and verified in FPGA

open-source-fpga-bitcoin-miner icon open-source-fpga-bitcoin-miner

A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.

verilog-lfsr icon verilog-lfsr

Fully parametrizable combinatorial parallel LFSR/CRC module

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