boost.lockfree tagged_ptr conflict with Hardware-assisted AddressSanitizer(HWASan) from LLVM project about lockfree

[timblechmann]

do aarch64 have any form of double-width compare and swap? disabling the ptrcompression would probably result in using 128bit atomics, which would have to be emulated by using locks (with all the side effects that one could not use the data structures in shared memory for example).

would it be possible to simply exclude the ptrcompression code from hwasan via compiler attributes?

[lbtrace]

@timblechmann thanks your reply.

• Actually, in Aarch64 from armv8.1 "CASP" instruction can support 128 bits CAS operation.
  For detail you can check https://en.wikichip.org/wiki/arm/armv8.1 and https://developer.arm.com/documentation/100076/0100/a64-instruction-set-reference/a64-data-transfer-instructions/caspa--caspal--casp--caspl--caspal--casp--caspl

• Enable hwasan usually via compiler flags "-fsanitize=hwaddress", we can exclude ptrcompression, but if we run boost in Hwasan device(only libc enable hwasan, boost not enable hwasan compile), like Android, we can't avoid this issue(because boost using memory from libc, boost ptrcompression still conflict with libc memory pointer enabled hwasan)

[timblechmann]

Actually, in Aarch64 from armv8.1 "CASP" instruction can support 128 bits CAS operation

interesting. i don't have access to any armv8.1 (just a rpi4, which seems to be armv8.0). could you try to change https://github.com/boostorg/lockfree/blob/develop/include/boost/lockfree/detail/prefix.hpp#L26 to disable pointer compression for arm 8.1.0 and check it the atomics are lockfree? also i wonder if there are any performance implications that may favour pointer compression with 64bit cas over 128 cas ...

[lbtrace]

@timblechmann I can't identify minor version "x" of armv8.x, maybe I only disable pointer compression for hwasan test