cfelton Goto Github PK

alt.hdl

Exploration of alternative hardware description languages

comphdl

Compare HDLs

coveralls-python

Show coverage stats online via coveralls.io

edalize

filter-blocks

A collection of digital hardware filters implemented in myhdl

gizflo

that FPGA flow

gsoc

Scripts and ideas related to managing Google Summer of Code for the Python Software Foundation

hdmi-source-sink-modules

Implementation of a HDMI Source/Sink Modules in MyHDL (http://www.myhdl.org/)

hdmi2usb

Hardware based on a Xilinx Spartan 6 FPGA for capturing HDMI and DVI data.

jpegencv1

minnesota

A collection of HDL cores written in MyHDL.

musicbox_simple

This is a simple "musicbox" FPGA (HDL) example inspired by a reddit question.

myhdl

myhdl_exercises

MyHDL exercises.

myhdlpeek

Monitor and display signal waveforms from your MyHDL digital design in a Jupyter notebook.

myx

FPGA designs for the XESS boards: xula, xula2, CAT, stickit, etc.

notebook_slides

Presentations generated with jupyter notebook

oh

An Open Hardware Library

parallella_elink

Parallella elink DV and alternate implmentation.

pyfda

Python Filter Design Analysis Tool

pymtl

Python-based hardware modeling framework

pythonuberhdl

Python Jupyter Notebooks and FPGA designs showcasing what myHDL can do over traditional Verilog or VHDL

rhea

A collection of MyHDL cores and tools for complex digital circuit design

scikit-fuzzy

Fuzzy Logic SciKit (Toolkit for SciPy)

scikit-kinematics

Python functions for working with 3D kinematics.

sdram_controller

Implementation of a SDRAM controller in MyHDL (http://www.myhdl.org/)

serv

SERV - The SErial RISC-V CPU

site-myhdl

myhdl.org website

site-myhdl-dev

dev.myhdl.org website

test_gemac

This is a myhdl test environment for the USRP simple_gemac core.