chisuhua Goto Github PK

aichip_paper_list

attila-sim

axi

AXI4 and AXI4-Lite interface definitions and testbench utilities

breezee

microkernel os

cash

A C++ Library for Hardware Design and Simulation

chisel3

Chisel 3: A Modern Hardware Design Language

clang

coasm

codeobject assember

codrive

comodel

concurrentqueue

A fast multi-producer, multi-consumer lock-free concurrent queue for C++11

cosmos

c++11基础库

costream

cutlass

CUDA Templates for Linear Algebra Subroutines

dinocpu

A teaching-focused RISC-V CPU design used at UC Davis

dlpack

RFC for common in-memory tensor structure and operator interface for deep learning system

dmlc-core

A common bricks library for building scalable and portable distributed machine learning.

fairmot

A simple baseline for one-shot multi-object tracking

firrtl

Flexible Intermediate Representation for RTL

flextensor

Automatic Schedule Exploration and Optimization Framework for Tensor Computations

gdev

First-Class GPU Resource Management: Device Drivers, Runtimes, and CUDA Compilers for Nouveau.

gdev-1

First-Class GPU Resource Management: Device Drivers, Runtimes, and CUDA Compilers for Nouveau.

gem5

This is an read-only mirror of the gem5 simulator. The upstream repository is stored in https://gem5.googlesource.com, code reviews should be submitted to https://gem5-review.googlesource.com/. The mirrors are synchronized every 15 minutes.

gem5-gpu

gem5-riscv-ccc

A gem5 fork with rudimentary RISC-V Full System support and an custom extension interface. Extensions can be generated with this project: https://github.com/tud-ccc/riscv-custom-extension

gem5-riscv-fullsystem

This is the public repository for Gem5 RISCV full system mode.

gem5_benchmark

gpa

GPU Performance API for AMD GPUs

gpgpu-sim_distribution

gpgpu-sim_distribution-1

GPGPU-Sim provides a detailed simulation model of a contemporary GPU running CUDA and/or OpenCL workloads and now includes an integrated (and validated) energy model, GPUWattch.