chrispville Goto Github PK

64dd-dumps

Various data dumps from the 64DD

64dd-schematics

Schematics for the Nintendo 64 Disk Drive (N64DD)

aux-display

CAD and Conky configs for a 1920x480 HSD088IPW1 Display

esp32-tcp-boot

TCP socket bootloader for the ESP32 over WPA2-Enterprise networks

fsys.io

The fsys.io site, where I can organize my thoughts and share them

glacierize

Python based incremental file backup using large archives for minimal cost AWS Glacier storage

h8-dumper

Clock glitching FPGA-based ROM dumper for the H8/3292 and related mask ROM parts

hpgl-distiller

HPLG filter for output devices

iconic

Some brief notes about the Gamebube IPL bug

iplboot

Minimal GameCube IPL

jtaglet

Easy-to-use JTAG TAP and Debug Controller core written in Verilog

mig_example

Example using DDR2 memory and MIG IP on the Nexys 4 DDR / Nexys A7 FPGA Trainer

n64chain

A (free) open-source N64 development toolchain.

openpnp

Open Source SMT Pick and Place Hardware and Software

openpnp-config

Machine configuration files for my OpenPnP based Pick and Place machine

pico-uart-bridge

Raspberry Pi Pico UART-USB bridge

plytogx

PLY to GX call converter for libogc based GCN/Wii applications

quokka

Quokka 6502 Microprocessor Trainer

raisin64

RISC Architecture with In-order Superscalar INterlocked-pipeline - 64 Bits

raisin64-binutils

Fork of binutils-gdb for the Raisin64

raisin64-cpu

raisin64-docs

Source and build tree for the Raisin64 project documentation

raisin64-gcc

raisin64-nexys4ddr

Reference implementation of the Raisin64 on a Nexys 4 DDR board

raisin64-openocd

OpenOCD port for the Raisin64

rl02

RL02-USB Interface

roverradio

Custom 50Mhz QAM/PSK ham radio for my rover project

tinytapeout-frog4bitcpu

tt02-frog4bitcpu

FROG 4-bit CPU TT2

vga-chargen

Pipelined VGA text/character generator controller in Verilog