Comments (4)
Hi,
If you check the original draft we sent to Jason, there is a gem5 part which hasn't been added to the paper as far as I can see:
"My contribution involved the definition of a QoS-aware memory controller in gem5, and the definition of basic (example) policies modelling the prioritization algorithm of the memory controller. Those are the Fixed priority policy (every master in the system has a fixed priority assigned) and the Proportional Fair policy (where the priority of a master is dynamically adjusted at runtime based on utilization).
I have rewritten the DRAM controller in gem5 to include the QoS changes; with the framework in place a user can write its own policy and seamlessly plug it into a real memory controller model to unlock system wide explorations under its own arbitration algorithm."
from gem5-20-paper.
Thanks! I think including this in the maker will make it more complete.
from gem5-20-paper.
The PR has been merged, feel free to close the issue
from gem5-20-paper.
Thanks everyone!
from gem5-20-paper.
Related Issues (20)
- Section titles capitalization
- Bibliography format HOT 1
- Minor issues in the text HOT 1
- Breadth of gem5 usage HOT 1
- Move future to the end of the paper HOT 1
- Section 2.14.3 Quality of Service Extensions HOT 2
- Comments about Fig1 and Section 1/1.1 HOT 2
- SystemC integration described in section 1.2 HOT 1
- Suggestion: the overview section for describing major improvement HOT 2
- Section 1.2, System Simulation Toolkit ==> Structural Simulation Toolkit?
- "Learning gem5" in italics
- Missing the caption of Fig 3.
- section 2.9 predictor improvement portion HOT 5
- commit 7e4f832 erroneously removed the branch predictor section HOT 1
- Comments about Section 1.2
- Suggestion: Table with list of subsection in Section 2 HOT 2
- Section 2.17 mentions missing SST section HOT 1
- Add trademark symbols when referring to Arm technology HOT 4
- Fix SVE contributors HOT 3
- Suggestion: Reorder paragraphs in section 2.11
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from gem5-20-paper.