dibakarbarua Goto Github PK

advcompileroptimizations

cache_funcsim

A parameterized cache simulator supported by a variable sized victim cache and a variable degree strided prefetcher (tunable C,B,S,V,K values) to assess the performance of various SPEC based benchmarks using varying 64 bit addresses for reads and writes.

leetcode

LeetCode 175 Problems' Solutions (up-to-date)

ooocpu_funcsim

- Developed a simulator for a single-core Out-of-order Superscalar Multiprocessor using the hardware paradigm followed by Tomasulo's Algorithm (IBM 360/91), to assess cycle times for different instruction sets on various SPEC benchmark traces. - Presented an optimum processor configuration (Fetch Rate, Number of Functional Units for each Op and number of Result Buses) for each benchmark.

raspberrypi_baremetalfirmware

Raspberry Pi ARM based bare metal examples

tiadc_firmware

Road Accident Prevention Unit Multi Sensing-Actuation System for TIADC-2012/13. All India Third Prize Winner. C on the ARM Cortex M3 using TI's StellarisWare API

ubicomplab_internship

Summer Internship, 2013. MUC Lab- IIIT Delhi.