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Fahad's Projects

avatar icon avatar

Official code of our work, AVATAR: A Parallel Corpus for Java-Python Program Translation.

bitonic-sorting icon bitonic-sorting

Implementation of BitonicSorting algorithm on FPGA through SDAccel using Opencl as source code

chipyard icon chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

chisel-lab icon chisel-lab

Lab exercises for Chisel in the digital electronics 2 course at DTU

chisel3 icon chisel3

Chisel 3: A Modern Hardware Design Language

chisel_labs_giki icon chisel_labs_giki

These labs are based on Prof. Martin Shoeberl labs and intended as basic sessions to get one started with using Chisel with Nexys4 DDR FPGA board.

codegen icon codegen

CodeGen is an open-source model for program synthesis. Trained on TPU-v4. Competitive with OpenAI Codex.

f-mac icon f-mac

https://caravel-user-project.readthedocs.io

freedom icon freedom

Source files for SiFive's Freedom platforms

freepdk-45nm icon freepdk-45nm

ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen

low-power-asic-designs-based-on-cpf icon low-power-asic-designs-based-on-cpf

This repository contains part of our work done to infer power intent at a higher level of abstraction i.e. at the system-level. The designs span from simpler basic computing blocks to more practical HW acclerators.

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