Comments (3)
Just wanted to throw this out there, because I think it is interesting: After eliminating VAVE
in #22 and "re-connecting" VYPO
in #20, the net labelled P10_B
is the only one that has those pesky cells labelled "BUFFER?", which may or may not be inverting. Maybe this "discovery" helps somehow in finding the actual driver of this net.
Here are all the "BUFFER?" cells:
from dmg-cpu-inside.
@msinger , I have come to the same conclusion as you regarding these cells. If incorrectly named net P10_B becomes GND, everything works properly in my PPU simulation.
from dmg-cpu-inside.
@rgalland thank you very much, that's great to know. I haven't simulated the PPU yet, so I wasn't sure about this ground connection, until now. ^^
from dmg-cpu-inside.
Related Issues (20)
- Adders EFYK and EJOK got wrong input
- Clock inputs of FF25 register need to be inverted one more time HOT 2
- GAXU is an AND, not a NAND
- XECY is wrong flip-flop type
- Wrong input 4 for CUGU
- BUDA needs inverted CPU_RD
- Reset of registers FF24 and FF25 is wrong
- KYNY and KYLY are two names for the same cell
- KAKE in an OR gate
- DOXA is a NOR gate
- BYHO has wrong input
- HAFE is a NOR gate
- Rare type of single-output flip-flop may have Q instead of !Q
- APU CH1 and CH2 volume envelope only work when AOI_MUX_2 cells have output inverted HOT 2
- HYNO is AND
- Misleading notes/labels on page 20 (APU CH4)
- ETAN is a NOR
- GOJY is connected to wrong output of EMER
- HUDA is an AND
- KOTA and JAFA are AND gates
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