Jirayu Peetakul's Projects
Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC Coding, Carry Select and Carry Look Ahead Adder, Carry Skip and Carry Save Adder, Complex Multiplier, Dice Game, FIFO, Fixed Point Adder and Subtractor, Fixed Point Multiplier and Divider, Floating Point IEEE 754 Addition Subtraction, Floating Point IEEE 754 Division, Floating Point IEEE 754 Multiplication, Fraction Multiplier, High Radix Multiplier, I2C and SPI Protocols, LFSR and CFSR, Logarithm Implementation, Mealy and Moore State Machine Implementation of Sequence Detector, Modified Booth Algorithm, Pipelined Multiplier, Restoring and Non Restoring Division, Sequential Multiplier, Shift and Add Binary Multiplier, Traffic Light Controller, Universal_Shift_Register, BCD Adder, Dual Address RAM and Dual Address ROM
Curated list of resources for Embedded and Low-level development in the Rust programming language
A complete computer science study plan to become a software engineer.
Compressive Sensing Imprementation in Python3
This resp created for novel compressed sensing based CMOS image sensor.
The Web framework for perfectionists with deadlines.
This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
Fabric generator and CAD tools
Rust crate for FreeRTOS
Github Pages template for academic personal websites, forked from mmistakes/minimal-mistakes
Compressed Sensing in c
Learning FPGA, yosys, nextpnr, and RISC-V
TRI-ML Monocular Depth Estimation Repository
Python Compressed Sensing algorithms
Launched in 2018 Actively developed and supported. Supports tkinter, Qt, WxPython, Remi (in browser). Create custom layout GUI's simply. Python 2.7 & 3 Support. 200+ Demo programs & Cookbook for rapid start. Extensive documentation. Examples using Machine Learning(GUI, OpenCV Integration, Chatterbot), Floating Desktop Widgets, Matplotlib + Pyplot integration, add GUI to command line scripts, PDF & Image Viewer. For both beginning and advanced programmers .
Python module containing verilog files for vexriscv cpu (for use with LiteX).
Silicon-validated SoC implementation of the PicoSoc/PicoRV32
GNU toolchain for RISC-V, including GCC
🤖 SoCFPGA: Open-Source Embedded Linux Distribution with a highly flexible build system, developed for Intel (ALTERA) SoC-FPGAs (Cyclone V & Arria 10)
Lp modeler written in Rust