Comments (8)
You might simply run out of space with the 4MB?
Theoretically I think we could make use of most of the 8M chip for bios too: after applying me_cleaner and re-arrange the partitions; pull extracted blobs into the coreboot build, create a 12M image (and possibly split that up again for hardware-flashing). But the result would be
- too hardware-dependent (I think; at least for now)
- inconvenient to handle for hardware-flashing
- force people to have me_cleaner applied
That said, at least I'd be very much interested at seeing such a working configuration.
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Doesn't coreboot build script report if it runs out of space?
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After recompiling with just nvramcui payload, it still does not work...
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Do you have any open problem here? Does building our configuration fail for you? thanks
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So building this should be possible. I don't do anything special, see https://www.coreboot.org/Build_HOWTO
- have the repo and submodules checked out
make crossgcc-i386
- have the config correct (either checkout the state I have or update your config to your current state)
- have the VGA bios file in coreboot's top level dir
make
just for reference. I know others have built based on this configuration already.
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