Comments (3)
I have created a PR #118 to fix this issue.
from corev-binutils-gdb.
I have created a PR #118 to fix this issue.
@forceofsystem Thanks for your PR. This was solved alternatively in commit 5507304
from corev-binutils-gdb.
Fixed in commit 5507304
from corev-binutils-gdb.
Related Issues (20)
- Naming of cv.slet HOT 1
- Update naming for xcvmem instructions HOT 3
- Handle the range of the immediate shift and extract instructions HOT 3
- tablejump section (__jvt_base$) need be aligned on a 64-byte boundary HOT 1
- simulator HOT 2
- HWLoop relocation error HOT 4
- incorrect opcode generated for cv.elw HOT 1
- Additional warning for clipr/clipur instructions HOT 1
- Does Event Load Word need a custom relocation HOT 3
- Incorrectly compiles functions in newlib with Zcmt-ext HOT 2
- ld segfault when linking .S assembly file HOT 5
- Using hexadecimal value for instruction signed immediate seems restricted to positive values. HOT 2
- Post-Increment Register-Immediate Load should be updated HOT 2
- Zcmt relaxation of single *.S-source bare metal code HOT 3
- The immediate field of shift instructions should be unsigned HOT 1
- disassembler translate cv.insert machine code wrongly to cv.muls HOT 3
- cv.avgu and cv.srl/sra/sll instructions out of sync HOT 3
- Getting CORE-V ready for Upstream HOT 2
- CORE-V: All instructions in binutils are currently using lowercase HOT 1
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