Comments (2)
OVGN
commented on May 26, 2024
Hello!
Is it possible to use OpenHBMC with the Cypress chip?
Sure.
Any ideas?
I need a bit more information about your IP core configuration. Can you share your project?
For example, Edit IP - Controller - Memory Clock Frequency - this parameter should be 88888888. Have you fixed this parameter?
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AnttiLukats
commented on May 26, 2024
Was the problem with the IP core and TE0725 resolved? I am the designer of TE0725 and would love to know.. We just verified OpenHBMC working on CR00107, we can reverify on TE0725 also, currently it's in the TODO list with a low prio.
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Related Issues (17)
- core as a slave HOT 3
- OpenHBMC HOT 14
- timing constraints HOT 23
- Problem with VDMAs and AXI-Interconnect HOT 15
- How DRU works? HOT 2
- iserdes clock frequency HOT 4
- ZYNQ 7000 compatibility HOT 2
- ISERDESE2 reset problem HOT 3
- source tcl on Windows HOT 1
- 2022.2 support? HOT 5
- Random failures? HOT 4
- AXI narrow burst support HOT 1
- HyperRAM 3.0 support HOT 1
- Failures on long runs. HOT 6
- Iserdese2 to iserdese3? HOT 3
- Does it support infineon HyperRAM chips? HOT 2
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