openocd dies immediately when connecting to spike about riscv-openocd

[timsifive]

Well, should be. Right now the debug tests aren't running as part of the travis check. On my todo list for post-64-bit. Tim

…

On Thu, Jun 8, 2017 at 1:23 PM, Megan Wachs ***@***.***> wrote: Yeah, that is why the check is done at riscv-tools level. — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#59 (comment)>, or mute the thread <https://github.com/notifications/unsubscribe-auth/APYH7YA0kyIWyk-fWN-gcW4oLJ5R6HRBks5sCFg8gaJpZM4N0gdu> .

[timsifive]

Output:

...
Debug: 175 8 riscv-013.c:966 examine(): dtmcontrol=0x61
Debug: 176 8 riscv-013.c:967 examine():   dmireset=0
Debug: 177 8 riscv-013.c:968 examine():   idle=0
Debug: 178 8 riscv-013.c:969 examine():   dmistat=0
Debug: 179 8 riscv-013.c:970 examine():   abits=6
Debug: 180 8 riscv-013.c:971 examine():   version=1
Debug: 181 9 riscv-013.c:207 scan(): 40b r 00000000 @10 -> F 00000000 @00
Error: 182 9 riscv-013.c:385 dmi_read(): failed read from 0x10, status=2

Error: 183 9 riscv-013.c:392 dmi_read(): Failed read from 0x10; value=0x7fffcda681b8, status=2

[mwachs5]

I am not going to have time to look at this today. Is it in reset or something? Does increasing the retry count on the read fix it?

[timsifive]

I'm looking at it because it's blocking me (unless we just want to outright revert).
In the future, please run riscv-tests/debug as part of creating a pull request.

[mwachs5]

Let's set it up on Travis if it needs to be tested as a condition for merge (I think that is tested as part of the merge to riscv-tools only)

[timsifive]

That would be cool, although what if there's a change that requires both spike and openocd to change at the same time? Tim

…

On Thu, Jun 8, 2017 at 12:41 PM, Megan Wachs ***@***.***> wrote: Let's set it up on Travis if it needs to be tested as a condition for merge — You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub <#59 (comment)>, or mute the thread <https://github.com/notifications/unsubscribe-auth/APYH7VPdu7eBQaIAT0HGN8DfCehUN37aks5sCE5ggaJpZM4N0gdu> .

[timsifive]

riscv-software-src/riscv-isa-sim#111 fixes this.

[mwachs5]

Yeah, that is why the check is done at riscv-tools level.