Comments (4)
Hi @123swk123,
We have improved the startup and exception handling for Nuclei RISC-V processor using NMSIS, and adjust the gd32vf103 firmware in our Nuclei SDK, which will of course fix the issue.
Thanks
Huaqi
from gd32vf103_firmware_library.
Has it been fixed already?
If so please share the commit details let me try to use it for my current work and feedback if I find something.
from gd32vf103_firmware_library.
It is not fixed in this repo, it is fixed in a seperated repo mentioned above maintained by Nuclei RISC-V Processor software team.
Thanks
Huaqi
from gd32vf103_firmware_library.
If you are using this repo, you can simply change this csrci CSR_MCOUNTINHIBIT, 0x5
to csrsi CSR_MCOUNTINHIBIT, 0x5
to enable the cycle/instret counter.
Thanks
Huaqi
from gd32vf103_firmware_library.
Related Issues (10)
- gd32vf103.h header cannot be used from C++ module HOT 5
- Alarmsystem for temp, GD32VF103
- Example code flash overflowed
- ADDSEND bit not be set, when check I2C_FLAG_ADDSEND status
- Add versions/releases/tags
- riscv-nuclei-elf toolchain HOT 1
- Compiling the USB CDC_ACM example for longan nano HOT 4
- Template Make error: No rule to make target 'build/start.o' , needed by gd32vf103.elf HOT 1
- I want to do preemptive interruptions. HOT 6
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