Comments (5)
The following code also has problem with cache simulator. This kernel is totally off. Actual data traffic should be 9 LOADS (misses) and 4 ST (evicts), but the simulator predicts totally lower values 4 LOADS (misses) and 1 STORE (evict) with n = 1000000.
Run : kerncraft -p ECM -m ~/Emmy.yml -D n 1000000 -D s 4 LC_jil.c --cache-predictor=SIM -vvv
LC_jil.tar.gz
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Should be fixed in f5011c5
TODO add unittests for this issue
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The second test case seems to be fixed, but the problems with first test case (LC_ilj) continues...
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That is another issue which is related to the selection of the warmup period. In this case it is too short for the cache to be fully occupied, which means that evicts do not (yet) go to main memory.
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Should be fixed with the latest commit
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Related Issues (20)
- Upgrade to latest ruamel.yaml to support Python 3.7
- Compiler selection order not constant HOT 1
- Print compiler calls with verbosity flags HOT 1
- Pack kernel in a function for Benchmark mode HOT 5
- precompile kernel for benchmark HOT 1
- Arrays not swapped between sweeps in compilable code HOT 2
- Support parallel execution of Kerncraft on same kernel file
- Merge LC model and LC cache predictor
- Generic ECM model description in Machine File
- Print load and store bytes per iteration/CL in LC module HOT 1
- Return git hash with --version, if available HOT 1
- Make machine model vs hardware check more robust HOT 2
- Document current machinefile format
- Extend benchmarks to include repeated measurements
- Intel compiler requires zmm-usage option for AVX512 code HOT 1
- Allow machine file features to be overwritten from the command line
- Extend layer conditions with a transition model
- Redirect version information to stdout HOT 2
- Cache Simulator Speedup Improvements: Elements per Iteration assumption? HOT 4
- other iaca_instrumentation() parameter needed as described
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