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followers: 8.0 following: 0.0 repos: 11.0 gists: 0.0

Name: Amol Salunke

Type: User

👋 Hi, I’m Amol Salunke,
I'm a Design Verification Engineer, passionate about coding. Currently, I work as a design verification engineer and enjoy coding in Verilog and SystemVerilog.
🧠 Key Skills: ... Verilog,SystemVerilog,C,C++,Python.
🌱 I’m currently learning: ... SoC Design Verification
📫 How to reach me: ... [email protected]
🎓 Education: M.Tech in Wired and Wireless Communication from College of Engineering,Pune(coep),State-Maharashtra.

Amol Salunke's Projects

basic-digital-circuit-assertions

In this repository,I have covered assertion based verification of basic digital circuits.

basics-of-assertions

c-programming-basics

In this repository,i have covered basic concepts of c programming

constraint-problems

In this repository,i have solved constraint problems

cplusplus-programming-basics

functional-coverage-practice

In this Repository, I have covered all the concepts of functional coverage with code.

salunkead

Config files for my GitHub profile.

svcodingexcercises

systemverilog-basics

In this repository, I have covered the basics of SytemVerilog.

uvm-basics-example

verilog-basic-concepts

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