Comments (6)
Thank you for the update. I knew about the turbo keys, but sometimes it is easier to have a DOS executable to switch the clock, eg. to use it in a batch file, so I made this: https://github.com/TzOk83/setclk and believe it or not, this is my first useful program in x86 assembly.
P.S.
According to your table, 60h is 0 WS for 7.15 MHz.
from 8088_bios.
To be honest, I didn't look at that much. So it is a good reminder.
I recall that with processor running at 9.54 MHz and 0WS I was getting issues with some ISA cards, e.g. the output on TVGA9000i was corrupted.
I can try adding a BIOS configuration option to specify the wait states configuration
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Forgive me my ignorance, but do you set FLCK flag (bit 3) during initial setup? If this bit is set, then in consecutive port writes, bits 0-4 are ignored. This would make it easier to software change remaining bits, as the configuration register is write-only, so you can't read current configuration from it to mask bits 0-4 and change only bits 5-7.
Here is my little utility to set the CPU clock from DOS:
setclk.zip
from 8088_bios.
The lower 640 KiB of memory, always operate at 0 WS. The wait states given in the CPU Clock Frequency and Wait States table only refer to the memory above 640 KiB (video memory, BIOS extensions, UMBs, ROM BIOS)
The BIOS does not set the FLCK (bit 3 ), so bits 0-4 remained unlocked, and you need to take care of updating them properly.
The BIOS supports switching between turbo modes using the following key combinations: Ctrl-Alt-<+> - 9.54 MHz, Ctrl-Alt-<*> - 7.15 MHz, and Ctrl-Alt-<-> - 4.77 MHz. In addition to bits 5-7, the BIOS also sets bit 1, if 8087 FPU is present. It checks the equipment configuration word to determine that. See cpu.inc for details.
I re-tested my Micro 8088 board with both Faraday FE2010A and Proton PT8010AF chipsets with all the combinations of settings described in the CPU Clock Frequency and Wait States table. My VGA card does not work well with Faraday FE2010A, when it is configured for 9.64 MHz with 0 memory wait states - I see video memory corruption. It does work well with Proton PT8010AF. I suspect there is a difference in the way these chipsets check the IORDY signal (VGA should generate wait states, but Proton doesn't seem to process them).
Also, there is a slight difference in the way DRAM refresh is disabled between these two chipsets. I updated the BIOS to disable the DRAM refresh on both chipsets. See 978df80
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I've added a configuration option in the BIOS setup to change the wait state configuration. I did not implement 0 WS for the upper memory, as it results in unstable configuration on FE2010A chipset. See d4f5ec3
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I believe my table is correct... When I use FE2010A, my system work fine with 0 WS at 7.15 MHz, but it doesn't work with 0 WS at 9.54 MHz (video memory glitches)
from 8088_bios.
Related Issues (20)
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