Comments (2)
Hi, I figure out how to set it.
iis3dwb_pin_int1_route_t int1_route = {0x00};
iis3dwb_xl_full_scale_set(&hAcc, IIS3DWB_2g);
iis3dwb_block_data_update_set(&hAcc, 1);
iis3dwb_fifo_watermark_set(&hAcc, 0x1FF);
iis3dwb_fifo_stop_on_wtm_set(&hAcc, 1);
iis3dwb_fifo_mode_set(&hAcc, IIS3DWB_STREAM_TO_FIFO_MODE);
iis3dwb_fifo_timestamp_decimation_set(&hAcc, IIS3DWB_NO_DECIMATION);
iis3dwb_fifo_xl_batch_set(&hAcc, IIS3DWB_XL_BATCHED_AT_26k7Hz);
iis3dwb_xl_data_rate_set(&hAcc, IIS3DWB_XL_ODR_26k7Hz);
int1_route.fifo_th = 1;
int1_route.fifo_ovr = 1;
int1_route.fifo_full = 1;
int1_route.fifo_bdr = 1;
iis3dwb_pin_int1_route_set(&hAcc, &int1_route);
When the interrupt occurs, just need read the fifo like it.
iis3dwb_fifo_status_get(&hAcc, &statusFifo2);
if(statusFifo2.fifo_wtm_ia)
{
iis3dwb_fifo_data_level_get(&hAcc, &num);
waterLevel = num / 3;
fifoLevel = waterLevel;
while(waterLevel-- > 0 || i < fifoLevel)
{
iis3dwb_fifo_out_raw_get(&hAcc, data_raw_acceleration.u8bit);
acceleration_mg[i++] = iis3dwb_from_fs2g_to_mg(data_raw_acceleration.i16bit[0]);
acceleration_mg[i++] = iis3dwb_from_fs2g_to_mg(data_raw_acceleration.i16bit[1]);
acceleration_mg[i++] = iis3dwb_from_fs2g_to_mg(data_raw_acceleration.i16bit[2]);
}
/* Reset FIFO */
iis3dwb_fifo_mode_set(&hAcc, IIS3DWB_BYPASS_MODE);
iis3dwb_fifo_mode_set(&hAcc, IIS3DWB_STREAM_TO_FIFO_MODE);
}
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Good you were able to solve it by yourself.
From our side we need for sure to add more examples, for example using FIFO as you suggested. Thanks!
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Related Issues (12)
- Broken links on README.md HOT 2
- Cppcheck issues HOT 3
- Typo in iis3dwb_fifo_status_get HOT 1
- missing "user offset correction block" feature HOT 1
- Wrong description for some functions HOT 3
- SPI issue with STM32CubeH7 MCU Firmware Package v1.11.1 HOT 5
- 'const' missing in README.md HOT 1
- Doubt on iis3dwb_xl_hp_path_on_out_set() HOT 4
- Missing IIS3DWB_HP_ODR_DIV_4 option HOT 1
- Potential array overflow in iis3dwb_fifo_out_raw_get HOT 5
- iis3dwb_fifo_out_multi_raw_get dont work HOT 2
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