Hints on how to extend the GPIO peripheral. about neo430

[RickKimball]

OK, I think I figured out a solution. Apply the changes below and take a look at the sample C test demo:

diff --git a/rtl/core/neo430_gpio.vhd b/rtl/core/neo430_gpio.vhd
index a27b9ee..a9d2b1d 100644
--- a/rtl/core/neo430_gpio.vhd
+++ b/rtl/core/neo430_gpio.vhd
@@ -63,7 +63,7 @@ architecture neo430_gpio_rtl of neo430_gpio is
   -- accessible regs --
   signal irq_en    : std_ulogic;
   signal trigger   : std_ulogic_vector(01 downto 0);
-  signal dout, din : std_ulogic_vector(15 downto 0);
+  signal dout, din, dinout : std_ulogic_vector(15 downto 0);
   signal irq_mask  : std_ulogic_vector(15 downto 0);
 
   -- misc --
@@ -87,11 +87,15 @@ begin
         case addr is
           when gpio_out_addr_c =>
             dout <= data_i;
+            dinout <= data_i;
           when gpio_ctrl_addr_c =>
             trigger <= data_i(1 downto 0);
             irq_en  <= data_i(2);
           when gpio_irqmask_addr_c =>
             irq_mask <= data_i;
+          when gpio_toggle_addr_c =>
+            dout <= dinout xor data_i;
+            dinout <= dinout xor data_i;
           when others =>
             NULL;
         end case;
diff --git a/rtl/core/neo430_package.vhd b/rtl/core/neo430_package.vhd
index ee901d0..c7efc08 100644
--- a/rtl/core/neo430_package.vhd
+++ b/rtl/core/neo430_package.vhd
@@ -101,12 +101,13 @@ package neo430_package is
 
   -- IO: GPIO  --
   constant gpio_base_c : std_ulogic_vector(15 downto 0) := x"FFB0";
-  constant gpio_size_c : natural := 8; -- bytes
+  constant gpio_size_c : natural := 10; -- bytes
 
   constant gpio_in_addr_c      : std_ulogic_vector(15 downto 0) := std_ulogic_vector(unsigned(gpio_base_c) + x"0000");
   constant gpio_out_addr_c     : std_ulogic_vector(15 downto 0) := std_ulogic_vector(unsigned(gpio_base_c) + x"0002");
   constant gpio_ctrl_addr_c    : std_ulogic_vector(15 downto 0) := std_ulogic_vector(unsigned(gpio_base_c) + x"0004");
   constant gpio_irqmask_addr_c : std_ulogic_vector(15 downto 0) := std_ulogic_vector(unsigned(gpio_base_c) + x"0006");
+  constant gpio_toggle_addr_c  : std_ulogic_vector(15 downto 0) := std_ulogic_vector(unsigned(gpio_base_c) + x"0008");
 
   -- IO: High-Precision Timer --
   constant timer_base_c : std_ulogic_vector(15 downto 0) := x"FFC0";
diff --git a/sw/lib/neo430/neo430.h b/sw/lib/neo430/neo430.h
index 0dbd537..c71b0dd 100644
--- a/sw/lib/neo430/neo430.h
+++ b/sw/lib/neo430/neo430.h
@@ -161,6 +161,7 @@
 #define GPIO_OUT     (*(REG16 0xFFB2)) // r/w: parallel output
 #define GPIO_CTRL    (*(REG16 0xFFB4)) // -/w: control register
 #define GPIO_IRQMASK (*(REG16 0xFFB6)) // -/w: irq mask register
+#define GPIO_TOGGLE  (*(REG16 0xFFB8)) // -/w: parallel toggle
 
 // bits 1:0 of GPIO CTRL reg: Trigger
 // 00: low level

And here is the test application for my altera ep2c5t144c8:

// vim: ts=2 sw=2 expandtab
// led toggle using new GPIO_TOGGLE target
// see neo430 github for license info

// Libraries
#include <stdint.h>
#include "../../lib/neo430/neo430.h"

// Configuration
#define BAUD_RATE 19200

// Function prototypes
void delay(uint16_t t);

int main(void) {

  uart_set_baud(BAUD_RATE);
  USI_CT = (1<<USI_CT_EN);

  uart_br_print("\nToggle LED demo program\n");

  gpio_port_set(0b101); // turn off GPIO[0], turn on GPIO[1], turn off GPIO[1]

  while (1) {
    GPIO_TOGGLE = 0b111;  // toggle all GPIO[0:2]
    delay(250);           // wait 100ms 
  }

  return 0;
}

/* ------------------------------------------------------------
 * 1ms delay on an Altera ep2c5t144c8 running at 100MHz
 * ------------------------------------------------------------ */
void delay(uint16_t t) {

  uint16_t i = 0;
  while (t--) {
    for (i=0; i<4544; i++)
      asm volatile ("nop");
  }
}

I would have put the gpio_toggle_addr at an offset of 0x0004 and then shifted all the other registers. However, I didn't want to break compatibility with the current neo430.h header

[stnolting]

You are going the right way ;)

• Find some free space in the IO space and add an address for your new CPU-accessible peripheral register
• Add read and/or write features to the peripheral module (just expand the read/write access processes)
• Add the new register to the main CPU C include header
• Write a "driver" that simplifies the software access to your new feature

The actual functionality you want to implement in the GPIO module does not sound too complicated. Basically, just XOR the new data input with the current GPIO output port when writing to your new toggle register - just like you did in the code you send me.

Greetings,
Stephan