tanvir-jewel Goto Github PK

-7-segments-indication-driver

Creation of a 7-Segments Indication Driver for FPGA SPARTAN 3 console ,on ISE Design Suite (Verilog).

4_bit_accumulator

aes-dom

DOM Protected Hardware Implementation of AES

ascon_dom

DOM Protected hardware Implementations of Ascon variants

bitslice_accumulator

Design, layout, and analysis of an accumulator bitslice consisting of a full adder and a resettable flip-flop.

chipwhisperer-nist-lwc

A wrapper repository for porting NIST Lightweight Cryptography Algorithms to the ChipWhisperer

cmos_circuits_verilog

cpplinks

A categorized list of C++ resources.

data-science-course

Data Science Course Materials - Fall 2014

dsp-assignment

gamma_filter_de1_soc_fpga

FPGA implementation (on DE1-SoC) of a gamma power function, which improves the clarity of the video output by transforming the intensity values of each pixel value in every frame of video input.

gray-counter-fpga

he-toolkit

The Intel Homomorphic Encryption (HE) toolkit is the primordial vehicle for the continuous distribution of the Intel HE technological innovation to users. The toolkit has been designed with usability in mind and to make it easier for users to evaluate and deploy homomorphic encryption technology on the Intel platforms.

hoacs_rnc

keccak_dom

DOM Keccak design by David Schaffenrath

microcontroller-and-interfacing

multiplication-matrix

network_on_chip

Simulation, synthesis, and physical design for an NoC. Each tile of the chip multiprocessor (CMP) NoC has a router and associated processing core.

nist-lwc-power-analysis

Power Analysis Attacks of some of the finalists to the NIST Lightweight Cryptography Contest, implemented in Python on the ChipWhisperer framework

puf_rng_64_bit

This project implements a 64-bit Ring oscillator based PUF on Arty A7 FPGA

risu64

Toy RV64 processor for fun & learning

semester-final-question

Ans of all semster final questions

simplex

An attempt to design a complete functioning processor and it's assembler and OOP compiler

sound_display_entertainment-system_on_baysys3

The SDE system, by interfacing the Basys 3 Development Board with the PmodMIC3 and the PmodOLED. The system will capture and digitize the audio signal input from the microphone on the PmodMIC3. The data will then be processed by the FPGA, for display on the PmodOLED

synthesis_pnr_vlsi-ii

This repository contains the project report of and verilog file of VLSI-II lab course project.

tanvir.github.io

My personal website.

three_unitcell_nanoribbon_hamiltonian

verilog

Simple Verilog Programs written for my VLSI coursework.

verilog_calculator_matrix_multiplication

This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.

vga-driver-implementation

Implementation of a VGA (Video Graphics Array ) driver, for FPGA SPARTAN 3 console, on ISE Design Suite (Verilog).