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ap7350

MT6735

basic-simd-processor-verilog-tutorial

Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU.

bootloader-8-core

DSP bootloader

dsp-layer1-gsm-processing-c6678

Multicore GSM layer1 singal processing

fpga-dsp

DSP primitives for "soft"ware defined radio

fpga-fft

A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm

gsm-amr

Modifying GSM-AMR encoder/decoder source code to produce high fidelity compression and decompression for DSP

gsm-dsp

https_client

HTTP/HTTPS REST Client C Library

leansdr

Lightweight, portable software-defined radio

lte-cell-scanner

LTE SDR cell scanner optimized to work with very low performance RF front ends (8bit A/D, 20dB noise figure)

lte-sidelink

An open MATLAB software library for the 3GPP LTE sidelink interface

matlab-library

Matlab functions for wireless communications focussing mostly on LTE / 3GPP.

mediatek-heliox10-baseband

MediaTek MT6795 (Helio X10) baseband source code

mitel-monitor

moly.lr9.w1444.md.lwtg.mp.v88

1

netup_dual_universal_ci-fpga

VHDL NetUP Universal Dual DVB-CI FPGA firmware

oplzkwp

ELF obfuscator

plkl01-b330-kernel

Kernel for the Honor 7 phone - Marshmallow 6.0

python-fmcw

Tutorials on frequency modulated continuous wave (FMCW) and Chirp Sequence Modulation RADAR algorithms.

scps_project

open source from open channel

simdump

SIM files dumper

verilog-axi

Verilog AXI components for FPGA implementation

verilog-axis

Verilog AXI stream components for FPGA implementation

virtualsoc-wcdma

Automatically exported from code.google.com/p/virtualsoc-wcdma

xvc-ftdi-jtag

Xilinx virtual cable server for generic FTDI 4232H.