Comments (2)
Currently, it supports translation for Intel CPUs operating in IA32e mode (or 64-bit mode). 32-bit mode and others are not supported. In theory, it can do translation for all of the valid mappings, i.e, 4K, 2M and 1G mappings. However, I only have a unit test for the 2M case.
By the way, it assumes that the page entry it get is valid as dictated by the Intel manual (Reserved bits are 0s and so on).
Reference: Intel Developer Manuals, Volume 3, 4.5 4-Level Paging
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Documentation:
Also, it looks like this feature has already been implemented in kvmi-semantic
crate:
https://github.com/kylerky/kvmi-rs/blob/master/kvmi-semantic/src/memory/address_space.rs#L210
cc @kylerky can you tell us more about the state virtual address translation in kvmi-semantic
?
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Related Issues (20)
- RUSTSEC-2020-0095: difference is unmaintained
- Init function should be fallible HOT 1
- Driver initialization should be fallible HOT 1
- Build system: opportunistic drivers
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- KVM: Handle read size > 4K
- API: remove get_page_access HOT 2
- Design: refactoring read_physical API HOT 2
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- LeechCore integration HOT 34
- Design: Driver initialization argument handling HOT 6
- RUSTSEC-2020-0077: memmap is unmaintained
- Native VirtualBox driver via builtin debugger interface HOT 3
- Windows release
- RUSTSEC-2021-0119: Out-of-bounds write in nix::unistd::getgrouplist
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