Add Intel XED as decoder/disassembler about sandsifter

[hlide]

Case of near JMP:

{
ICLASS    : JMP
CPL       : 3
CATEGORY  : UNCOND_BR
EXTENSION : BASE
ISA_SET   : I86
ATTRIBUTES: MPX_PREFIX_ABLE
PATTERN   : 0xE9 not64 BRDISPz()
OPERANDS  : RELBR:r:z REG0=XED_REG_EIP:rw:SUPP
PATTERN   : 0xE9 mode64 FORCE64() BRDISP32()
OPERANDS  : RELBR:r:d REG0=XED_REG_RIP:rw:SUPP
}

it doesn't seem to apply the correct pattern for AMD though.

[jakob-engblom-i]

XED is probably the best source for Intel encodings of instructions.

Speaking for myself, not for my employer.