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500lines

500 Lines or Less

ll

LL toll

phd2017

2017project

satz

SAT-solver to compare RLL and Anti-SAT

specification

VLSI design project Specification Group B: ARC Group member: Jiang Zhiyuan, Yang Haoxiang, Guan Shanyue, Zhang Yue We aiming at achieving a CPU with remarkable and balanced performance in this project. We found some data of other CPUs on the internet, and after investigation and comparison our specification are decided as following: Speed: 150MHz Throughout: 5 stages pipeline Energy: 2.5W Completeness of instruction: All the instructions in Simplified MIPS32® Instruction Set (MIPS32 Instruction Set Quick Reference is attached in the email as a pdf document) Because we did not find any cpu built by the exactly same technology of the one in the VLSI design project, so the specification data is not perfect. We are looking forward to discuss our specification with you to make it achievable.

university-computer

zyzlxyzy

Config files for my GitHub profile.