MaxXSoft/verilator-axi-testbench
A Verilator-based testbench for AXI4 initiator DUTs.
El Psy Kongroo
A Verilator-based testbench for AXI4 initiator DUTs.
Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.
The Gee (寂) Operating System, written in YuLang.
Tools for manipulating Fast Signal Trace (FST) format waveforms.
The Yu (羽) programming language.
Tensors and Dynamic neural networks in Python with strong GPU acceleration
write some gadgets to eXtend STL ...
Fast and memory-efficient exact attention
A naive neural network generator, OpenCL supported.
JDK main-line development https://openjdk.org/projects/jdk
Build lexers and parsers by deriving traits.
Sigma Virtual Machine.
BOOM's Simulation Accelerator.
Doubly-linked list that stores key-node pairs.
https://openjdk.org/projects/jdk-updates
README of myself.
Documentation of YuLang.
https://openjdk.org/projects/jdk-updates
PKU Puzzle Club (PKUPC) 资料站,包括 P&KU 系列活动、公众号文章等内容。
Design and implementation of a functional scripting language.
Split large FIRRTL into separated modules for incremental compilation.
FCEUX, a NES Emulator
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
https://openjdk.org/projects/jdk-updates
Risky32 is a RISC-V emulator written in C++.
Some bare-metal software that can run on Fuxi SoC.
Asserts const generic expressions at build-time.
Implement a PL/0 compiler and interpreter from scratch