A synthesizable VHDL based cycle accurate PERformance SImulation Architecture for Networks-on-chip. PERSIAN-NoC is a parameterized RTL model for evaluating the performance factors of NoC based interconnection networks.

pipecnn

An OpenCL-based FPGA Accelerator for Convolutional Neural Networks

poc

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

pothos-zynq

DMA source and sink blocks for Xilinx Zynq FPGAs

primerunity

Tool use for producing Primer YouTube videos

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Python Productivity for ZYNQ

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Notes on the Red Pitaya Open Source Instrument

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riscv-boom

SonicBOOM: The Berkeley Out-of-Order Machine

riscv-coremark

Setup scripts and files needed to compile CoreMark on RISC-V

riscv_vhdl

VHDL implementation of the RISC-V System-on-Chip based on bare "Rocket Chip".

ruby_tutorials_core

code examples to help enrich the documentation available for ruby's core classes ri output of the core classes

rustlings

:crab: Small exercises to get you used to reading and writing Rust code!

rx5808-pro-diversity

DIY project to create your own 5.8ghz FPV diversity basestation - based off the rx5808 receiver module. Project includes basic Arduino Nano implementation to advanced custom PCB board and introduction to digital switches 4066 chip.

serpentai

Game Agent Framework. Helping you create AIs / Bots to play any game you own! BETA

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💫 Industrial-strength Natural Language Processing (NLP) with Python and Cython

sparkfun-eagle-libraries

SparkFun's Public Eagle PCB Footprints using Eagle 6.0+

sublime-vhdl

VHDL Package for Sublime Text 2/3

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