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Numerical computing for Yolol

Home Page: https://yolk.crespi.dev

License: Apache License 2.0

Makefile 0.17% Rust 99.83%
rust yolk yolol

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yolk's Issues

Refactor BuiltinExpr to FoldExpr

FoldExpr { op: InfixOp, args: Vec<Expr>

  • Prevents panic when kind is not "sum" or "product"
  • Allows extension to fold more operations

Missing parens in formatter

import a
b = a and (a and a)

produces b=a and a and a, but should produce b=a and(a and a)

Use associativity instead of commutativity for bracket choices in formatter

Focus on parallelism

  • Focus on automatic parallel computation
  • Distribute workload over n chips
  • Leave comments on "wait" lines

Optimize nested operations

import a
let b = 1 + (2 + a)
export b

produces b=1+2+a, but should produce b=3+a.

Can add match case to optimizer. Need to handle both (2+a) and (a+2), as well as all other commutative operations.

Add CLI

  • Similar to Yovec: yolk -i source.yolk -o out.yolol

Update README

  • Show example first
  • Offer bullet point differences from Yolol

Re-export core functions

In src/lib.rs

pub use parser::parse;
pub use transpiler::transpile;
pub us optimizer::optimize;

Remove dead code elimination

  • Too confusing, offers little better
  • Already included in Martin's optimizer
  • Focus more on expression reduction

Add index and slice operators

  • Index: get single elem

  • Slice: get array of elems

  • index_expr = { expr ~ "[" ~ NUM ~ "]" }

  • slice_expr = { expr ~ "[" ~ NUM ~ ":" ~ NUM ~ "]" }

Incorrect precedence

import a
let b = 1 - (2-a)
export b

produces b=1-2-a, but should produce b=1-2+a, or at least b=1-(2-a)

Parallelism Proposal

TL;DR

Refocus Yolk on pipelined, parallel computation.

Abstract

Yolk currently focuses on single-chip numerical computing. This proposal would allow Yolk to seamlessly spread its Yolol output over n chips, making use of m data fields as registers. A scheduler would be implemented to manage statement execution.

Scheduling Algorithm

  1. Build a DAG of variable dependencies. Yolk's SSA form ensures that the dependency graph is acyclic.

  2. Linearize the DAG into stages. Statements within the same stage may be executed in any order.

  3. Assign statements to chips. All statements in stage n must execute before any statements in stage n+1. The assignment algorithm will minimize the following criteria, in order:

    1. Maximum number of lines on a single chip

    2. Number of chips used

    3. Number of register saves and loads

  4. Add register saves and loads to share values between stages. Register positions have already been marked by the previous step.

  5. Map stages to physical lines on chips. Some stages may take more than one physical line. Insert // Sync comments on empty lines.

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