The cadence-course-labs from carloscerq

cadence-course-labs's Introduction

This is the README file for:

  Verilog Language and Application- version 26.0

After installing the course, source the .class_setup C-shell script in this
directory. This shell script sets the path variables to find executables and
libraries. You must source this script in every C-shell in which you run the
tools. MODIFY THIS SCRIPT AS NEEDED FOR YOUR PLATFORM AND SHELLS.

The software products and versions required for this course are:

  -> Xcelium Simulator    21.1

Before you run any Cadence software, verify your patch level and install
any missing required patches, enter:
  <IUS_Install_Dir>/tools/bin/checkSysConf XCELIUM211
  <IUS_Install_Dir>/tools/bin/checkSysConf GENUS201

Although you can expect the Cadence software to work on any supported platform,
the course lab database has been tested only with the above software on:
  Linux RH EE 6.5
  Solaris 10

UNIX users can test the database with the C-shell script:

        .testscript

The test script verifies the following minimal licensing:

        NC_Verilog_Simulator

Additional notes :
   - Lab -2-2 gives the design diagram of the VeriRISC CPU for study to understand and explore since it will be used in all the labs till lab11. The labs flow would be to develop each component of this VeriRISC design starting form lab3 and then go on to verify the whole VeriRISC CPU design in lab11.Please go through this lab2 design carefully so that you understand the purpose of each of the labs till lab11.

Recommend Projects