ciniml / atom_display_fpga Goto Github PK

Hello dear ciniml,
thank you so much for coding this product, I can not thank you enough, it is so awesome!
Thank you for your time.

When I do this call with M5GFX:

M5AtomDisplay display(640, 360, 60, 640, 360);

I do not get any HDMI output. Also not with 640x480 (which is what I need)

It seems that every aspect ratio other than 16:9 is not working. I need the 640x480 aspect ratio to work for an AR glass micro oled... Is there a way to incorporate that resolution?

Again, thank you very much, I appreciate it a lot!

拝啓、ご無事であることを願っております。 atom_display_fpga リポジトリに対する素晴らしい取り組みに感謝します。 Scala について多くのことを学ぶのに役立ちました。

現在、Nano PSRAM モジュールを備えた M5Atom ディスプレイ キットを入手しています。

FPGA の更新は M5GFX ライブラリ内で行われることがわかりましたが、それは ID に文字 H と D が含まれている場合に限られます。

アップデート方法についてアドバイスをいただけますか?
または
コードがすでにサポートしている場合、正しい設定についてアドバイスをいただけますか?

周波数をサポートするためにbase_ Clockを変更しようとしました。

ディスプレイのタイミングが異なるため、更新する必要があります。
今までディスプレイは同期しませんでした。

日本語は私の主な言語ではないので、翻訳者を使用しています。
翻訳ミスはご容赦ください。 主に英語を使います

ディスプレイに関する詳細は次のとおりです。

Dear Mr. I hope You are well. Thank You for the amazing work on the atom_display_fpga repository. It helped me to learn a lot about scala.

I have now an M5Atom Display kit with the Nano PSRAM module.

I did see that the updating of the FPGA is done inside the M5GFX Library but only if the ID includes the letters H and D.

Can You give me advice how to update ?
OR
If the code already supports it can you give me advice for correct settings ?

I did try to modify the base_clock to support the frequency.

I need to update because my display has different timings.
Till now the Display does not sync.

Japanese is not my main language so i use a translator.
Please excuse translation errors. Mainly i use english

Following are the details about the Display.

1080x1080 Round Display 5" Size

This are working settings for Raspberry PI
hdmi_timings=1080 0 60 10 35 1080 0 10 4 2 0 0 0 60 0 77930000 0

I added this explanation here because it was hard to find
hdmi_timings=<h_active_pixels> <h_sync_polarity> <h_front_porch> <h_sync_pulse> <h_back_porch> <v_active_lines> <v_sync_polarity> <v_front_porch> <v_sync_pulse> <v_back_porch> <v_sync_offset_a> <v_sync_offset_b> <pixel_rep> <frame_rate> <pixel_freq> <aspect_ratio>

<h_active_pixels> = horizontal pixels (width)
<h_sync_polarity> = invert hsync polarity
<h_front_porch> = horizontal forward padding from DE acitve edge
<h_sync_pulse> = hsync pulse width in pixel clocks
<h_back_porch> = vertical back padding from DE active edge
<v_active_lines> = vertical pixels height (lines)
<v_sync_polarity> = invert vsync polarity
<v_front_porch> = vertical forward padding from DE active edge
<v_sync_pulse> = vsync pulse width in pixel clocks
<v_back_porch> = vertical back padding from DE active edge
<v_sync_offset_a> = leave at zero
<v_sync_offset_b> = leave at zero
<pixel_rep> = leave at zero
<frame_rate> = screen refresh rate in Hz
= leave at zero
<pixel_freq> = clock frequency (widthheightframerate)
<aspect_ratio> = *

This is EDID Information from Ubuntu 22.04 OS x86_64

Block 0, Base EDID:
EDID Structure Version & Revision: 1.3
Vendor & Product Identification:
Manufacturer: LZT
Model: 1
Made in: week 12 of 2017
Basic Display Parameters & Features:
Digital display
Image size is variable
Gamma: 2.20
RGB color display
First detailed timing is the preferred timing
Color Characteristics:
Red : 0.6015, 0.3359
Green: 0.3056, 0.5263
Blue : 0.1513, 0.1201
White: 0.3134, 0.3291
Established Timings I & II: none
Standard Timings:
Detailed Timing Descriptors:
DTD 1: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
Display Product Name: 'YongXing '
Display Product Serial Number: '00000000 '
Display Range Limits:
Monitor ranges (GTF): 23-75 Hz V, 15-240 kHz H, max dotclock 340 MHz
Extension blocks: 1
Checksum: 0x7c

Block 1, CTA-861 Extension Block:
Revision: 3
Basic audio support
Supports YCbCr 4:4:4
Supports YCbCr 4:2:2
Native detailed modes: 4
Video Data Block:
Audio Data Block:
Linear PCM:
Max channels: 2
Supported sample rates (kHz): 192 176.4 96 88.2 48 44.1 32
Supported sample sizes (bits): 24 20 16
Vendor-Specific Data Block (HDMI), OUI 00-0C-03:
Source physical address: 3.0.0.0
Supports_AI
Detailed Timing Descriptors:
DTD 2: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
DTD 3: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
DTD 4: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
DTD 5: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
DTD 6: 1080x1080 60.003 Hz 1:1 65.764 kHz 77.930 MHz (90 mm x 160 mm)
Hfront 60 Hsync 10 Hback 35 Hpol N
Vfront 10 Vsync 4 Vback 2 Vpol N
Checksum: 0x8e

恐れ入ります。
README 記載の手順を進めていたところ「IPの再生成」の箇所でエラーが出ておりました。

Unknown UP type, Please check your IP Configu file.
IPC file device information is lost.

（私の環境での固有の問題でしたら申し訳ないです）

ダウンロード可能だった、Gowin V1.9.8.09 を使用しているのですが、
EDA に SDRAM_controller_top_SIP と sdram_rpll の IP が存在しない？ため、Select IP Config file から該当 ipc を開いてもエラーになっているかと思われました。

何か回避方法などあったりしますでしょうか...？
ご確認を頂けますと幸いです。

Hi! I noticed that at VGA (640x480) the pushImage is very slow, taking almost under a second of time to write the image to the hdmi output from top to bottom.

I need to write a full vga buffer to the display at once (renders only the whole frame, not pixel by pixel), preferrably at 60 FPS. For my graphics, I need to render to a buffer in RAM that I can write to the display, then it should output the whole image at once and not sequentially (instead of for example drawing every line one by one, resulting in way more lag and latency than buffering the lines in an array and displaying the whole image)

Is that possible?

Hello! Where can I find the PCB design files? I would like to further shrink it down and use both sides of the PCB.
Thank you