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This repository is for 2019 NCKUEE FPGA System Design course

Home Page: http://vlsilab.ee.ncku.edu.tw/

Pascal 0.01% JavaScript 0.18% Shell 0.10% Batchfile 0.01% Tcl 0.66% HTML 22.36% Verilog 3.13% C 9.26% VHDL 52.04% Stata 0.03% Forth 0.01% TeX 0.03% PureBasic 0.01% Scala 0.14% C++ 1.03% Makefile 0.04% Assembly 0.11% CartoCSS 0.01% SystemVerilog 2.48% Coq 8.41%

2019_fpga_design's Introduction

Undergraduate course -- FPGA Design

This repository provides various FPGA design tutorials.

Final Project Presentation Agenda

以下為期末專題報告的注意事項:

  1. 報告地點為超大型積體電路設計實驗室 (奇美樓 5F 95514室)
  2. 請於報告前五分鐘到實驗室報到
  3. 報告用的投影片請在報告前一天前寄到這個信箱,並在標題加上【FPGA期末專題PPT】,並註明組別
  4. 請一併將板子、線材、記憶卡帶來歸還

Agenda

Tool

FPGA Development Board

Learning Resource

Appendix A -> References

GitHub Learning Resource

SystemVerilog

Verilog

Teaching Assistance

來信請在標題加上【FPGA】

範例:【FPGA】Homework3 Problem1問題

2019_fpga_design's People

Contributors

weichenghowswai avatar

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