knitkit
Syntax is close to chisel3, without FIRRTL optimizing and generating readable Verilog code faster.
Quick Install
Global installation
$ sudo pip3 install knitkit
Local installation
$ pip3 install --user knitkit
Usage
$ knitkit create hello_knitkit
$ cd hello_knitkit
$ make verilog
Source code in hw/knitkit/src/Mux2.scala
and generated in builds/Mux2.v
.
Install in offline environment
Download knitkit-py and then:
$ pip3 install --user knitkit-0.3-py3-none-any.whl
The same as quick install.
Install
Build by SBT or Mill locally. If just have a look, use Scastie online.
SBT
- Create
hello_knitkit
project directory.
$ mkdir -p hello_knitkit/src/main/scala
$ cd hello_knitkit
$ touch build.sbt
- Create SBT configuration as below:
lazy val hello = (project in file("."))
.settings(
name := "HelloKnitkit",
scalaVersion := "2.13.6",
libraryDependencies += "io.github.colin4124" %% "knitkit" % "0.3.0",
)
- Write
Knitkit
source code:
$ touch src/main/scala/Mux2.scala
import knitkit._
class Mux2 extends RawModule {
val sel = IO(Input(UInt(1.W)))
val in0 = IO(Input(UInt(1.W)))
val in1 = IO(Input(UInt(1.W)))
val out = IO(Output(UInt(1.W)))
out := (sel & in1) | (~sel & in0)
}
object Main extends App {
Driver.execute(() => new Mux2, args(0))
}
- Run SBT, the first argument is generated directory, here is
builds
.
$ sbt "run builds"
- Check generated verilog file
builds/Mux2.v
:
module Mux2 (
input sel,
input in0,
input in1,
output out
);
assign out = (sel & in1) | ((~ sel) & in0);
endmodule
Mill
- Create
hello_knitkit
project directory.
$ mkdir -p hello_knitkit/src
$ cd hello_knitkit
$ touch build.sc
- Create Mill configuration as below:
import mill._, scalalib._
object hello extends ScalaModule {
def scalaVersion = "2.13.6"
def millSourcePath = super.millSourcePath / ammonite.ops.up
def ivyDeps = Agg(
ivy"io.github.colin4124::knitkit:0.3.0",
)
}
-
Put source code
Mux2.scala
tohello_knitkit/src/
directory. -
Run Mill,
hello
is theobject
name inbuild.sc
defined,builds
is the first argument where verilog generated.
$ mill hello.run builds
- Check generated verilog file
builds/Mux2.v
.
Online Scastie
-
Open Scastie website.
-
Click
Build Settings
in left sidebar. -
Choose
scala 2
inTarget
,2.13.6
inScala Version
, searchknitkit
inLibraries
. -
Click
Editor
in left sidebar, wirte down:
import knitkit._
class Mux2 extends RawModule {
override def desiredName = "Mux2"
val sel = IO(Input(UInt(1.W)))
val in0 = IO(Input(UInt(1.W)))
val in1 = IO(Input(UInt(1.W)))
val out = IO(Output(UInt(1.W)))
out := (sel & in1) | (~sel & in0)
}
Driver.genVerilog(() => new Mux2)
- Here is the exmple