Compiling and running an embedded Rust application for the NEORV32 RISC-V soft core CPU
Current development is based on the Arduino MKR Vidor 4000 FPGA Board
Update the submodules
cd neorv32-rust
git submodule init
git submodule update
Source the NEORV32 RISCV tools. If in doubt, check the NEORV32 Software Toolchain Setup.
In order to generate the image that is downloaded by UART, the image_bin binary needs to be compiled first. Simplest way currently is compiling a software example:
cd submodules/neorv32/example/blink_led
make exe
The current testing application can be built with the following script:
./generate_bin.sh
NOTE: This will build and image for UART uploading via the bootloader.
The generated NEORV32 binary in located under bin folder. You can proceed with the programming procedure as explained in the NEORV32 User Guide
- There is an issue with the UART, the program hangs when there are multiple print statements, this does not happens when the program is loaded by the debugger
- Current memory definitions are/might not be accurate. It assumes that the NEORV32 uses the SDRAM available on the Vidor 4000 with a larger size than actually required
- Initial code based on the developments for the iCEBreaker-FPGA
- Very useful video on Writting a Rust HAL from Scratch from Jame's Office Hours
- To be updated