cvonk / fpgamath

Verilog HDL implementations of adders/subtractor, multiplier, divider and square root. As well as HTML simulations.

FPGAmath

Building math circuits

The article Building Math Circuits describes how elementary math operations, such as addition/subtraction, multiplication/division and square root, can be done using logic circuits.

The repository contains HTML simulations used in the article, as well as Verilog HDL implementations of

• Adder
  • ripple carry
  • look ahead
  • look ahead with 2 levels
• Subtractor
  • ripple borrow
• Multiplier
  • array
  • carry save
• Divider
  • attempt subtraction

Demo

But what good are fast math circuits, if you can’t show them off? We decided to make a test setup to both demonstrate and verify the implementation of the circuits.

In the demo, an Arduino reads the operands from rotary encoders and shows them on 7-segment displays. It sends the operands along with the desired operation to the FPGA. That then returns the result to the Arduino, that shows it on the display.

Details of the demonstation setup can be found here.

Feedback

We love to hear from you. Please use the article blog or the Github discussions to provide feedback.