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This repository is intended for folks who are new and want to learn something about FPGA. This repository is a collection of useful resources and links rather than a thorough FPGA tutorial. Traditional HDL (Hard and Difficult Language) is not the main focus, instead, we focus on using high-level languages (e.g., C++) to cook FPGA.
Originally, this repository was started by a newbie to record his learning of FPGA, and late made public in the hope that it could help researchers to start their journey along with FPGA, with less pain and whiskey.
Resources collected here, or the way contents are organized, are not in their perfect shape. This repository is still raw and need major improvements. Any form of contribution is welcomed and appreciated.
Main contents:
README.md
- Basics about Digital Design
- Basics about FPGA
- Relevant Courses and Books
- Papers about FPGA internal
Xilinx
xilinx.md
xilinx_constraints.md
xilinx_cheatsheet.md
xilinx_lessons_vivado.md
xilinx_lessons_hls.md
submodules/
: Github repositories about FPGAhls/
: Sample Xilinx HLS C++ code- AXI Stream
- Network protocol processing
xilinx_arty_a7
: Sample Xilinx projects for Arty A7 100 board- Tri-mode MAC reference design
- Simple LED
- Clocked LED
FAQ.md
- Some implementation questions about FPGA
- URL: RapidWright FPGA Architecture Basics
- URL: RapidWright Xilinx Architecture Terminology
- Book: Parallel Programming for FPGAs
- Basic about FPGA and HLS
- URL: All about FPGAs, EE Times
- Slides: Intro FPGA CSE467 UW
- URL: I/O Pads
- BGA Wiki: In a BGA the pins are replaced by pads on the bottom of the package. If you check PGA package, you will know the difference between pin and pad, and immediately get why it is called pad. And you will also know what's the pad in the IO Block diagram.
- PDF: The Digital World
- Wiki: Differential signaling and Wiki: Single-ended signaling
- Book: Digital design and computer architecture
- Content-Addressable Memory Introduction
- A Survey and Evaluation of FPGA High-Level Synthesis Tools
- Xilinx Introduction to FPGA Design with Vivado High-Level Synthesis
- Xilinx Vivado Design Suite User Guide High-Level Synthesis
- Xilinx SDAccel Development Environment Help for 2018.2 XDF
- The Zynq book
- Parallel Programming for FPGAs
- GMU ECE 699 Software/Hardware Co-design S15
- CMU ECE 18-643
- Cornell ECE5775 from Prof. Zhiru Zhang
- Online: Real Digital
- CMU ECE 18-643
- I like its slides, very informative. Slides about PR, Verilog, HLS are good.
- Also read its references, all quite good papers.
- Cornell ECE5775 from Prof. Zhiru Zhang
- GMU ECE 699 Software/Hardware Co-design S16
- GMU ECE 699 Software/Hardware Co-design S15
- DAMN, this is a good and practical course.
- MIT 6.111 Introductory Digital Systems Laboratory
- MIT 6.375 Complex Digital Systems
- UCB EECS 151/251A