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This project forked from oldrepopreservation/mpeg2fpga

0.0 0.0 0.0 2.95 MB

An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.

Home Page: http://www.kdvelectronics.eu/mpeg2fpga/mpeg2fpga.html

Makefile 0.54% Coq 1.72% Verilog 75.84% Perl 0.40% C 17.42% Objective-C 1.41% C++ 1.02% Assembly 1.53% Shell 0.12%

mpeg2fpga's Introduction

This is a mpeg2 video core. To run a testbench:

1. Download a sample video

cd tools/streams
wget ftp://ftp.tek.com/tv/test/streams/Element/MPEG-Video/625/susi_015.m2v
mv susi_015.m2v stream-susi.mpg

2. Install Icarus verilog

apt-get install iverilog

3. Run testbench

cd bench/iverilog
Verify top of Makefile looks like this:

STREAM = ../../tools/streams/stream-susi.mpg
MODELINE = MODELINE_SIF

make clean test

Directory ought to fill with .ppm files.

mpeg2fpga's People

Contributors

koendv avatar

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