engdoreis / opentitan-pac

The opentitan peripheral access crate generated by svd2rust.

opentian-pac

The opentitan peripheral access crate generated by svd2rust.

How to build

cargo build --bin hello_world --open

Documentation

cargo doc --open

How to import this crate into your project

Add the dependency to the Cargo.toml:

[dependencies]
earlgrey-pac = {git = "https://github.com/engdoreis/opentitan-pac.git"}

And to the source file:

#![no_main]
#![no_std]
extern crate panic_halt as _;
use earlgrey_pac::Peripherals;
use riscv_rt::entry;
#[entry]
fn main() -> ! {
    let p = Peripherals::take().unwrap();
    let uart = p.UART0;
    loop{}
}

Linker script

You need to tell the linker your memory layout by providing a linker script to it. You can you use the linker script provided by the riscv-rt crate in conjunction with the earlgrey memory layout. Create a cargo config file:

mkdir .cargo
nano .cargo/config.toml

Add the linker flags:

[target.riscv32imc-unknown-none-elf]
rustflags = [
  # This is provided by earlgrey-pac crate build.rs.
  "-C", "link-arg=-Tearlgrey_memory.x",

  # This is provided by the riscv-rt crate build.rs.
  "-C", "link-arg=-Tlink.x",
]

How to update the svd file

python3 tools/generate_svd.py -g https://github.com/lowRISC/opentitan.git -o svd/earlgrey.svd