AIM:
To implement Encoder 8 To 3 in Dataflow Modelling using verilog and validating their functionality using their functional tables
SOFTWARE REQUIRED: Quartus prime
THEORY
Encoder 8 To 3
The 8 to 3 line Encoder is also known as Octal to Binary Encoder. In 8 to 3 line encoder, there is a total of eight inputs, i.e., D0, D1, D2, D3, D4, D5, D6, and D7 and three outputs, i.e., A0, A1, and A2. In 8-input lines, one input-line is set to true at a time to get the respective binary code in the output side. Below are the block diagram and the truth table of the 8 to 3 line encoder.
Figure 01 Block Diagram of Encoder 8 * 3
Truth Table
The logical expression of the term A0, A1, and A2 are as follows:
A0 = D1 + D3 + D5 + D7
A1 = D2 + D3 + D6 + D7
A2 = D4 + D5 + D6 + D7
Logical circuit of the above expressions is given below:
Figure 02 Encoder 8 * 3
Procedure
/* write all the steps invloved */
PROGRAM
module encoder_top(din, a, b, c);
input [0:7] din;
output a,b,c;
assign a=din[4] | din[5] | din[6] | din[7];
assign b=din[2] | din[3] | din[6] | din[7];
assign c=din[2] | din[4] | din[6] | din[7];
endmodule
Developed by:E.PRIYADHARSHINI
RegisterNumber: 212223230159
RTL LOGIC FOR Encoder 8 To 3 in Dataflow Modelling
![image](https://private-user-images.githubusercontent.com/144870831/318633628-303bf849-1e5b-4d77-860a-c3596e7231c5.png?jwt=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpc3MiOiJnaXRodWIuY29tIiwiYXVkIjoicmF3LmdpdGh1YnVzZXJjb250ZW50LmNvbSIsImtleSI6ImtleTUiLCJleHAiOjE3MjUzODcyMjEsIm5iZiI6MTcyNTM4NjkyMSwicGF0aCI6Ii8xNDQ4NzA4MzEvMzE4NjMzNjI4LTMwM2JmODQ5LTFlNWItNGQ3Ny04NjBhLWMzNTk2ZTcyMzFjNS5wbmc_WC1BbXotQWxnb3JpdGhtPUFXUzQtSE1BQy1TSEEyNTYmWC1BbXotQ3JlZGVudGlhbD1BS0lBVkNPRFlMU0E1M1BRSzRaQSUyRjIwMjQwOTAzJTJGdXMtZWFzdC0xJTJGczMlMkZhd3M0X3JlcXVlc3QmWC1BbXotRGF0ZT0yMDI0MDkwM1QxODA4NDFaJlgtQW16LUV4cGlyZXM9MzAwJlgtQW16LVNpZ25hdHVyZT05ODZiYjAzMTVkN2FhYjgxMDdjM2ViOWIyM2Q3NmY2YTc2ZTE1NmU1YzAxYzE5ZWM0MjJiYzM5YTFkMGFjMzUzJlgtQW16LVNpZ25lZEhlYWRlcnM9aG9zdCZhY3Rvcl9pZD0wJmtleV9pZD0wJnJlcG9faWQ9MCJ9.vL0RCTtPtysvWFl1UT2UnTZjsvCnF-Va5phuuN0qnk8)
TIMING DIGRAMS FOR Encoder 8 To 3 in Dataflow Modelling
![image](https://private-user-images.githubusercontent.com/144870831/318633859-9801fcf0-5a51-463a-8b8a-f4f786e5a6b9.png?jwt=eyJhbGciOiJIUzI1NiIsInR5cCI6IkpXVCJ9.eyJpc3MiOiJnaXRodWIuY29tIiwiYXVkIjoicmF3LmdpdGh1YnVzZXJjb250ZW50LmNvbSIsImtleSI6ImtleTUiLCJleHAiOjE3MjUzODcyMjEsIm5iZiI6MTcyNTM4NjkyMSwicGF0aCI6Ii8xNDQ4NzA4MzEvMzE4NjMzODU5LTk4MDFmY2YwLTVhNTEtNDYzYS04YjhhLWY0Zjc4NmU1YTZiOS5wbmc_WC1BbXotQWxnb3JpdGhtPUFXUzQtSE1BQy1TSEEyNTYmWC1BbXotQ3JlZGVudGlhbD1BS0lBVkNPRFlMU0E1M1BRSzRaQSUyRjIwMjQwOTAzJTJGdXMtZWFzdC0xJTJGczMlMkZhd3M0X3JlcXVlc3QmWC1BbXotRGF0ZT0yMDI0MDkwM1QxODA4NDFaJlgtQW16LUV4cGlyZXM9MzAwJlgtQW16LVNpZ25hdHVyZT1hYWI2Yzc5ZmU1NmZjYTgxNTM2NTljZmJhZGNlYTliMDVmOTY3MWZhYTk4MmQ0ZmM1MGE5ZDYyMThlODcyMmQxJlgtQW16LVNpZ25lZEhlYWRlcnM9aG9zdCZhY3Rvcl9pZD0wJmtleV9pZD0wJnJlcG9faWQ9MCJ9.HD_CmDl3mJ9442YUngQU6g-zaHYHkCnFqHdPDMDd5DI)
RESULTS Thus the code is ececuted successfully.