Comments (17)
On Xtensa based chips the interrupt handlers correspond to the interrupt level (in contrast to RISCV based ones). That might be quite confusing I guess - and we should do a better job explaining both. Actually, user code shouldn't even use levels 4-7.
So having level1 to level7 is enough (and more than you should use)
There is also an interrupt matrix involved which maps the peripheral interrupts to CPU interrupts.
That might reduce some of the confusion, I hope.
However, it doesn't explain why it doesn't work you. My own tests look fine so I need to just try your code
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It seems like #55 should fix this
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With the changes in https://github.com/orangecms/esp-hal/tree/gpio-input-pullup-fix the two GPIOs 0 and 5 are working now.
π₯³
So I guess that 2 and 12 are special as mentioned in #55.
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Good to hear that - GPIO 2 and 12 issues should be solved by #55 - hope to get to that soon
Also, thanks for raising this issue - it's very valuable
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@orangecms I have put together something here: https://github.com/bjoernQ/esp-hal/tree/bugfix/errata_3_6 Would be great if you can find some time to give this a try - hopefully this will fix the issue
YES! I am happy to report that indeed this fixes both GPIOs 2 and 12 π₯³ Thank you so much! \o/
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Greate - thanks for giving it a try. Will create a PR for this
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Looking through the linker scripts and various repos - hal, pac, rt -, I am a bit confused that only interrupt functions 1-7 are defined.
So I need to extend the linker script? And how would I do that?
https://github.com/esp-rs/xtensa-lx-rt/blob/master/exception-esp32.x.jinja Is this what I need to do, map to the low-level functions?
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Browsing other issues, I also found this, is it related?
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So, I gave your code a try and it seems like there is an issue with GPIO5 for me but the others are working.
I modified your code here: https://gist.github.com/bjoernQ/71999fd43eba4680a09a9870eb7e9311
Maybe you can give that a try and see if the inputs beside GPIO5 is working for you
from esp-hal.
Looking further into this it seems it's more an issue of configuring pull-downs / pull-ups than an issue with interrupts
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Thank you a lot - I will adhust the title and try your suggestions. :-)
Since I want to check for edge triggers, I understand now that I need to use a lower priority interrupt handler for that, because level 1 is not available for that. The relationship between the handler numbering and the level was indeed not clear to me. Thank you so much!
I'll also see that I file some PRs against the hal repo to simplify and explain the example. :-)
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@orangecms would you mind posting your working MicroPython code? Thanks
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@orangecms would you mind posting your working MicroPython code? Thanks
Sure :)
https://github.com/das-labor/badge-2021/blob/main/sw-demo/spi_rects.py#L12
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There is definitely one thing that looks wrong:
esp-hal/esp-hal-common/src/gpio.rs
Line 506 in eb47b0f
PU should be true
here
Still that doesn't solve the problem for all the pins as it seems
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Awesome, thank you so much! π
I'll gladly test this and report back. :-)
We'll be at GPN and bring a few of these fancy badges. Let me know if you're also around and I'll gladly give you one. π
from esp-hal.
@orangecms I have put together something here: https://github.com/bjoernQ/esp-hal/tree/bugfix/errata_3_6
Would be great if you can find some time to give this a try - hopefully this will fix the issue
from esp-hal.
Just one note: They also both trigger once initially. That can be worked around, but might be surprising.
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Related Issues (20)
- Migration guide for updating to `[email protected]` HOT 1
- The esp-hal/README needs updating
- Update the `CONTRIBUTING.md` guide
- Determine which cargo features to enable for Clippy and MSRV checks HOT 1
- Incorrect comment about measurement ranges for ADC HOT 1
- Embassy main proc_macro doesn't have rustdoc for every generated element HOT 2
- AES seems to only support 128-bit keys HOT 1
- DMA: Add option to configure psram block size
- SpiDma Half duplex is hard to use HOT 3
- embassy tick options like `tick-hz-16_000_000` seems to have been removed
- Update the checklist in the PR template
- ESP32C3 USB pullup interferes with GPIO configuration HOT 1
- Remove `'static` bound requirement on DMA buffers? HOT 1
- RFC: What to do about `async` vs `direct-vectoring` features? HOT 1
- Find a way to use ROM memset/memcpy - if it can't work, we should ensure memcpy and memset are in RAM somehow HOT 5
- TRNG #1200 breaks esp-wifi for ESP32-S2 HOT 1
- esp-hal 0.16.0 : Can't compile esp-wifi with the new esp-hal 0.16.0 HOT 3
- TWAI Overrun error when compiling in debug mode HOT 3
- Be explicit about the need to build using the `release` profile HOT 2
- Donβt forget to upgrade the defmt version in esp-backtrace and esp-println. HOT 1
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