esynr3z / proto245 Goto Github PK

Hello,

I'm using your proto245 in sync mode on a FT2232H, clock at 60Mhz.
Lattice ESCP5 running @ 50Mhz.
I've setup IN and OUT delay like your example de10lite (8.333 ns)
I've just translated it to Verilog, and implemented a loopback test.
I've a "strange" semi-randomic issue on TX. The more bytes i sent, the more is frequent.
Using Lattice Reveal ft_data (din during RX) is recorded correctly to my fifo, then send it back correctly (dout).
But for some reason on PC sometimes a byte get lost. When it happens my fifo is shifted by one.
I've checked it using two different FT2232H and different cables.
I suspect it's a clock issue, do you have a clue or suggestion?

Note: setting TX_BURST_SIZE to 1 helps, but the logic is slow down too much for my requirements.

Thanks!

Hello!
I'm testing out your module using a FT232H.
Do you have an AXIS wrapper for this module?
Thank you!