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free-utils-hdl's Projects

axicores icon axicores

AXI4-Compatible Verilog Cores, along with some helper modules.

chips-2.0 icon chips-2.0

FPGA Design Suite based on C to Verilog design flow.

csi2rx icon csi2rx

Open Source 4k CSI-2 Rx core for Xilinx FPGAs

ft2232h-fifo icon ft2232h-fifo

FT2232H (FT245 Synchronous and Asynchronous modes) and Synchronous FIFO for high speed USB transfer

ft245_interface icon ft245_interface

Verilog module to communicate with the FT245 interface of an FTDI FT2232H

ponylink icon ponylink

A single-wire bi-directional chip-to-chip interface for FPGAs

proto245 icon proto245

🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)

uart icon uart

verilog module for serial asynchronous communication in 8/N/1

verilog-utils icon verilog-utils

native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches

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