mil1553-spi's Introduction

mil1553-spi

MIL-STD-1553 <-> SPI bridge with internal memory buffer support.

Available commands (see detailes in /doc):

transmit data to mil interface
get data, received from mil interface
status request
device reset

Attention: It was not tested with real MIL-STD-1553 devices. This project is my student work and some of its parts are realy terrible. So do not use it in real applications.

IP core block diagram

Directory structure

Folder	Description
/doc	project documentation
/src/board/DE0	Altera and Terasic board specific code for hardware tests
/src/board/DE0_tests/batch_tests	simple batch data transfer tests (SpiLight is used)
/src/board/DE0_tests/MilLight	bridge communication .NET library, Unit Test Project for automatic hardware testing
/src/mil1553-spi	mil1553-spi bridge IP cores SystemVerilog source code
/src/testbench	mil1553-spi bridge IP cores SystemVerilog testbenches

Hardware test configuration

Hardware test configuration build report

+---------------------------------------------------------------------------------+
; Flow Summary                                                                    ;
+------------------------------------+--------------------------------------------+
; Flow Status                        ; Successful - Sun Dec 04 17:52:03 2016      ;
; Quartus II 64-Bit Version          ; 13.1.0 Build 162 10/23/2013 SJ Web Edition ;
; Revision Name                      ; DE0_TOP                                    ;
; Top-level Entity Name              ; DE0_TOP                                    ;
; Family                             ; Cyclone III                                ;
; Device                             ; EP3C16F484C6                               ;
; Timing Models                      ; Final                                      ;
; Total logic elements               ; 2,077 / 15,408 ( 13 % )                    ;
;     Total combinational functions  ; 1,960 / 15,408 ( 13 % )                    ;
;     Dedicated logic registers      ; 837 / 15,408 ( 5 % )                       ;
; Total registers                    ; 837                                        ;
; Total pins                         ; 252 / 347 ( 73 % )                         ;
; Total virtual pins                 ; 0                                          ;
; Total memory bits                  ; 4,096 / 516,096 ( < 1 % )                  ;
; Embedded Multiplier 9-bit elements ; 0 / 112 ( 0 % )                            ;
; Total PLLs                         ; 1 / 4 ( 25 % )                             ;
+------------------------------------+--------------------------------------------+

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