hamsternz / fpga_mandelbrot Goto Github PK
View Code? Open in Web Editor NEWA real-time Mandelbrot fractal viewer for FPGAs
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How to use?
After modify the netlist about the fan pwm. I have generated the bit file and programed the Genesys2. HDMI display ok.
Can you provide more detailed operate steps.
serialiser_10_to_1.vhd not working
I have tried simluating serialiser_10_to_1.vhd on vivado 2018.1 but the output waveforms are incorrect. I don't know if there are other vhd files requied for simluating serialiser_10_to_1.vhd successfully.
I have set : clk = 20MHz
clk_x5 = 100MHz
reset = 0 (constant)
data = 2a6
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